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4 pages, 202 KiB

Open AccessEditorial

Next-Generation Electronics and Sensing Technology

by Trong-Yen Lee, Yen-Lin Chen and Yu-Cheng Fan

Sensors 2021, 21(23), 7958; https://doi.org/10.3390/s21237958 - 29 Nov 2021

Cited by 2 | Viewed by 1917

Abstract

This Special Issue is dedicated to several aspects of next-generation electronics and sensing technology and contains eight papers that focus on advanced sensing devices, sensing systems, and sensing circuits that focus on the state-of-the-art methods for sensing technologies [...] Full article

(This article belongs to the Special Issue Selected Papers from the 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018))

Research

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11 pages, 4224 KiB

Open AccessArticle

A Novel Dual-Band Six-Phase Voltage-Control Oscillator

by San-Fu Wang, Yu-Wei Chang and Chun-Yen Tang

Sensors 2018, 18(11), 4025; https://doi.org/10.3390/s18114025 - 19 Nov 2018

Cited by 6 | Viewed by 3921

Abstract

The paper presents a novel dual-band six-phase voltage-control oscillator. The voltage-controlled oscillator (VCO) with a single-ended delay cell architecture has a lower power consumption, a smaller chip area, and a larger output swing than one with a differential delay cell architecture. However, the [...] Read more.

The paper presents a novel dual-band six-phase voltage-control oscillator. The voltage-controlled oscillator (VCO) with a single-ended delay cell architecture has a lower power consumption, a smaller chip area, and a larger output swing than one with a differential delay cell architecture. However, the conventional even-phase outputs ring-type VCO cannot be implemented using single-ended delay cells. In other words, the VCO with single-ended delay cells meets most of the requirements of a sensor circuit system, except even-phase outputs function. This work presents a dual-band six-phase ring type VCO, which is implemented using the proposed single-ended delay cell. The proposed VCO both exhibits the advantages of single-ended delay cells and differential delay cells. The proposed delay cell has a band-switching function, which improves the jitter performance of a VCO in which it is used. The proposed VCO can be operated at 890–1080 MHz. The peak-to-peak jitter and the root mean square jitter are the 35.5 ps and 2.8 ps (at 1 GHz), respectively. The maximal power consumption is approximately 6.4 mW at a supply voltage of 1.8 V in a United Microelectronics Corporation 0.18 μm RF CMOS process. The area of the chip is 0.195 × 0.208 mm². Full article

(This article belongs to the Special Issue Selected Papers from the 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018))

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14 pages, 1806 KiB

Open AccessArticle

A Reliability Scheduling Algorithm for the Static Segment of FlexRay on Vehicle Networks

by Trong-Yen Lee, I-An Lin, Jun-Jie Wang and Ju-Tse Tsai

Sensors 2018, 18(11), 3783; https://doi.org/10.3390/s18113783 - 5 Nov 2018

Cited by 9 | Viewed by 4640

Abstract

FlexRay is a next-generation in-vehicle communication protocol which works in real time with flexibility. The most common applications in FlexRay are high bandwidth. X-by-wire applications, such as brake by wire and throttle by wire. However, there is no mechanism which can prevent transient [...] Read more.

FlexRay is a next-generation in-vehicle communication protocol which works in real time with flexibility. The most common applications in FlexRay are high bandwidth. X-by-wire applications, such as brake by wire and throttle by wire. However, there is no mechanism which can prevent transient faults in the application layer of FlexRay. If a transient fault occurs during driving, this would be very dangerous; therefore, we propose a fast reliability scheduling algorithm (FRSA) to improve the communication reliability of FlexRay. The proposed method reduces the probability of transient faults in one clock cycle by using a retransmission mechanism to recover the transient errors, and further improves computational complexity using the lookup table method to ensure system reliability. In this paper, we analyze a related literature to establish the system reliability constraints needed to evaluate the necessary time and slot usage, and the proposed cost function is used to evaluate the performance and efficiency when the number of messages is increased. Experimental results show that the proposed FRSA reduces execution time by an average 70.76% and cost by an average 13.33% more than the other existing methods. This method can be useful to others, especially regarding research about periodic time-triggered communication systems. Full article

(This article belongs to the Special Issue Selected Papers from the 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018))

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10 pages, 4981 KiB

Open AccessArticle

Sensing and Reliability Improvement of Electrostatic-Discharge Transient by Discrete Engineering for High-Voltage 60-V n-Channel Lateral-Diffused MOSFETs with Embedded Silicon-Controlled Rectifiers

by Shen-Li Chen and Yi-Cih Wu

Sensors 2018, 18(10), 3340; https://doi.org/10.3390/s18103340 - 6 Oct 2018

Cited by 2 | Viewed by 3628

Abstract

High-voltage n-channel lateral-diffused metal-oxide-semiconductor field-effect transistor (nLDMOS) components, fabricated by a TSMC 0.25-μm 60-V bipolar-CMOS-DMOS (BCD) process with drain-side embedded silicon-controlled rectifier (SCR) of the n-p-n-arranged and p-n-p-arranged types, were investigated, in order to determine the devices’ electrostatic discharge (ESD)-sensing behavior [...] Read more.

High-voltage n-channel lateral-diffused metal-oxide-semiconductor field-effect transistor (nLDMOS) components, fabricated by a TSMC 0.25-μm 60-V bipolar-CMOS-DMOS (BCD) process with drain-side embedded silicon-controlled rectifier (SCR) of the n-p-n-arranged and p-n-p-arranged types, were investigated, in order to determine the devices’ electrostatic discharge (ESD)-sensing behavior and capability by discrete anode engineering. As for the drain-side n-p-n-arranged type with discrete-anode manners, transmission–line–pulse (TLP) testing results showed that the ESD ability (I_t2 value) was slightly upgraded. When the discrete physical parameter was 91 rows, the optimal I_t2 reached 2.157 A (increasing 17.7% compared with the reference sample). On the other hand, the drain-side SCR p-n-p-arranged type with discrete-anode manner had excellent SCR behavior, and its I_t2 values could be increased to >7 A (increasing >281.9% compared with the reference DUT). Moreover, under discrete anode engineering, the drain-side SCR n-p-n-arranged and p-n-p-arranged types had clearly higher ESD ability, except for the few discrete physical parameters. Therefore, using the anode discrete engineering, the ESD dissipation ability of a high-voltage (HV) nLDMOS with drain-side SCRs will have greater effectiveness. Full article

(This article belongs to the Special Issue Selected Papers from the 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018))

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13 pages, 6114 KiB

Open AccessArticle

Fabrication and Characterization of a High-Performance Multi-Annular Backscattered Electron Detector for Desktop SEM

by Wei-Ruei Lin, Yun-Ju Chuang, Chih-Hao Lee, Fan-Gang Tseng and Fu-Rong Chen

Sensors 2018, 18(9), 3093; https://doi.org/10.3390/s18093093 - 14 Sep 2018

Cited by 4 | Viewed by 6483

Abstract

Scanning electron microscopy has been developed for topographic analysis at the nanometer scale. Herein, we present a silicon p-n diode with multi-annular configuration to detect backscattering electrons (BSE) in a homemade desktop scanning electron microscope (SEM). The multi-annular configuration enables the enhancement of [...] Read more.

Scanning electron microscopy has been developed for topographic analysis at the nanometer scale. Herein, we present a silicon p-n diode with multi-annular configuration to detect backscattering electrons (BSE) in a homemade desktop scanning electron microscope (SEM). The multi-annular configuration enables the enhancement of the topography contrast of 82.11 nA/μm as compared with the commercial multi-fan-shaped BSE detector of 40.08 nA/μm. Additionally, we integrated it with lateral p-n junction processing and aluminum grid structure to increase the sensitivity and efficiency of the multi-annular BSE detector that gives higher sensitivity of atomic number contrast and better surface topography contrast of BSE images for low-energy detection. The responsivity data also shows that MA-AL and MA p-n detectors have higher gain value than the MA detector does. The standard deviation of measurements is no higher than 1%. These results verify that MA p-n and MA-AL detectors are stable and can function well in SEM for low-energy applications. It is demonstrated that the multi-annular (MA) detectors are well suited for imaging in SEM systems. Full article

(This article belongs to the Special Issue Selected Papers from the 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018))

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25 pages, 6196 KiB

Open AccessArticle

Learning-Directed Dynamic Voltage and Frequency Scaling Scheme with Adjustable Performance for Single-Core and Multi-Core Embedded and Mobile Systems

by Yen-Lin Chen, Ming-Feng Chang, Chao-Wei Yu, Xiu-Zhi Chen and Wen-Yew Liang

Sensors 2018, 18(9), 3068; https://doi.org/10.3390/s18093068 - 12 Sep 2018

Cited by 29 | Viewed by 6158

Abstract

Dynamic voltage and frequency scaling (DVFS) is a well-known method for saving energy consumption. Several DVFS studies have applied learning-based methods to implement the DVFS prediction model instead of complicated mathematical models. This paper proposes a lightweight learning-directed DVFS method that involves using [...] Read more.

Dynamic voltage and frequency scaling (DVFS) is a well-known method for saving energy consumption. Several DVFS studies have applied learning-based methods to implement the DVFS prediction model instead of complicated mathematical models. This paper proposes a lightweight learning-directed DVFS method that involves using counter propagation networks to sense and classify the task behavior and predict the best voltage/frequency setting for the system. An intelligent adjustment mechanism for performance is also provided to users under various performance requirements. The comparative experimental results of the proposed algorithms and other competitive techniques are evaluated on the NVIDIA JETSON Tegra K1 multicore platform and Intel PXA270 embedded platforms. The results demonstrate that the learning-directed DVFS method can accurately predict the suitable central processing unit (CPU) frequency, given the runtime statistical information of a running program, and achieve an energy savings rate up to 42%. Through this method, users can easily achieve effective energy consumption and performance by specifying the factors of performance loss. Full article

(This article belongs to the Special Issue Selected Papers from the 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018))

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12 pages, 4888 KiB

Open AccessArticle

Electrical and Physical Characteristics of WO₃/Ag/WO₃ Sandwich Structure Fabricated with Magnetic-Control Sputtering Metrology †

by Shea-Jue Wang, Mu-Chun Wang, Shih-Fan Chen, Yu-Hsiang Li, Tien-Szu Shen, Hui-Yun Bor and Chao-Nan Wei

Sensors 2018, 18(9), 2803; https://doi.org/10.3390/s18092803 - 25 Aug 2018

Cited by 21 | Viewed by 3580

Abstract

In this work, three layers of transparent conductive films of WO₃/Ag/WO₃ (WAW) were deposited on a glass substrate by radio frequency (RF) magnetron sputtering. The thicknesses of WO₃ (around 50~60 nm) and Ag (10~20 nm) films were mainly the [...] Read more.

In this work, three layers of transparent conductive films of WO₃/Ag/WO₃ (WAW) were deposited on a glass substrate by radio frequency (RF) magnetron sputtering. The thicknesses of WO₃ (around 50~60 nm) and Ag (10~20 nm) films were mainly the changeable factors to achieve the optimal transparent conductivity attempting to replace the indium tin oxide (ITO) in cost consideration. The prepared films were cardinally subjected to physical and electrical characteristic analyses by means of X-ray diffraction analysis (XRD), field-emission scanning electron microscope (FE-SEM), and Keithley 4200 semiconductor parameter analyzer. The experimental results show as the thickness of the Ag layer increases from 10 nm to 20 nm, the resistance becomes smaller. While the thickness of the WO₃ layer increases from 50 nm to 60 nm, its electrical resistance becomes larger. Full article

(This article belongs to the Special Issue Selected Papers from the 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018))

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10 pages, 3392 KiB

Open AccessArticle

Fabrication and Characterization of Planar-Type Top-Illuminated InP-Based Avalanche Photodetector on Conductive Substrate with Operating Speeds Exceeding 10 Gbps

by Jheng-Jie Liu, Wen-Jeng Ho, Cho-Chun Chiang, Chi-Jen Teng, Chia-Chun Yu and Yen-Chu Li

Sensors 2018, 18(9), 2800; https://doi.org/10.3390/s18092800 - 25 Aug 2018

Cited by 6 | Viewed by 4599

Abstract

This paper presents a high-speed top-illuminated InP-based avalanche photodetector (APD) fabricated on conductive InP-wafer using planar processes. The proposed device was then evaluated in terms of DC and dynamic performance characteristics. The design is based on a separate absorption, grading, charge, and multiplication [...] Read more.

This paper presents a high-speed top-illuminated InP-based avalanche photodetector (APD) fabricated on conductive InP-wafer using planar processes. The proposed device was then evaluated in terms of DC and dynamic performance characteristics. The design is based on a separate absorption, grading, charge, and multiplication (SAGCM) epitaxial-structure. An electric field-profile of the SAGCM layers was derived from the epitaxial structure. The punch-through voltage of the SAGCM APD was controlled to within 16–17 V, whereas the breakdown voltage (V_BR) was controlled to within 28–29 V. We obtained dark current of 2.99 nA, capacitance of 0.226 pF, and multiplication gain of 12, when the APD was biased at 0.9 V_BR at room temperature. The frequency-response was characterized by comparing the calculated 3-dB cut-off modulation-frequency (f_3-dB) and f_3-dB values measured under various multiplication gains and modulated incident powers. The time-response of the APD was evaluated by deriving eye-diagrams at 0.9 V_BR using pseudorandom non-return to zero codes with a length of 2³¹-1 at 10–12.5 Gbps. There was a notable absence of intersymbol-interference, and the signals remained error-free at data-rates of up to 12.5 Gbps. The correlation between the rise-time and modulated-bandwidth demonstrate the suitability of the proposed SAGCM-APD chip for applications involving an optical-receiver at data-rates of >10 Gbps. Full article

(This article belongs to the Special Issue Selected Papers from the 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018))

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7 pages, 2004 KiB

Open AccessArticle

Steep Switching of In_0.18Al_0.82N/AlN/GaN MIS-HEMT (Metal Insulator Semiconductor High Electron Mobility Transistors) on Si for Sensor Applications

by Pin-Guang Chen, Kuan-Ting Chen, Ming Tang, Zheng-Ying Wang, Yu-Chen Chou and Min-Hung Lee

Sensors 2018, 18(9), 2795; https://doi.org/10.3390/s18092795 - 24 Aug 2018

Cited by 4 | Viewed by 4165

Abstract

InAlN/Al/GaN high electron mobility transistors (HEMTs) directly on Si with dynamic threshold voltage for steep subthreshold slope (<60 mV/dec) are demonstrated in this study, and attributed to displacement charge transition effects. The material analysis with High-Resolution X-ray Diffraction (HR-XRD) and the relaxation by [...] Read more.

InAlN/Al/GaN high electron mobility transistors (HEMTs) directly on Si with dynamic threshold voltage for steep subthreshold slope (<60 mV/dec) are demonstrated in this study, and attributed to displacement charge transition effects. The material analysis with High-Resolution X-ray Diffraction (HR-XRD) and the relaxation by reciprocal space mapping (RSM) are performed to confirm indium barrier composition and epitaxy quality. The proposed InAlN barrier HEMTs exhibits high ON/OFF ratio with seven magnitudes and a steep threshold swing (SS) is also obtained with SS = 99 mV/dec for forward sweep and SS = 28 mV/dec for reverse sweep. For GaN-based HEMT directly on Si, this study displays outstanding performance with high ON/OFF ratio and SS < 60 mV/dec behaviors. Full article

(This article belongs to the Special Issue Selected Papers from the 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018))

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