1. Introduction
Thermally grown silicon dioxide (SiO2) plays an essential role in today’s semiconductor device technology. Easy fabrication, high dielectric strength, and an outstanding degree of chemical passivation makes SiO2 the dielectric of choice for many silicon (Si) based devices. However, the actual oxide quality, which is achieved across the oxidation furnace, strongly depends on the correct choice of process parameters as well as on the equipment status. To monitor the oxidation process regarding important electrical oxide properties, a variety of characterization techniques is available.
Probably the most common approach to gain information about the electrical oxide quality are capacitance-voltage measurements, which are performed on metal oxide semiconductor (MOS) capacitors [
1]. In this method, a voltage is applied to the MOS structure in order to drive the near-surface condition from inversion to accumulation or vice versa. The resulting capacitance-voltage curves can be used to extract a variety of parameters, whereby the fixed oxide charge
Qox as well as the Si/SiO
2 interface state density
Dit are typically of particular interest. However, both capacitance-voltage measurements and the fabrication of MOS capacitors are very time-consuming, which is a severe drawback, especially if high throughput is required. In addition, the fabrication of MOS structures often requires high temperature process steps like post-implantation or forming gas annealing, which may alter the oxide properties drastically, i.e., information about the plain oxidation process is not easy to obtain.
A different technique to characterize the oxide quality are minority carrier lifetime (lifetime) measurements, which are performed in dependence of the near-surface condition. While sweeping the latter from accumulation to inversion, a distinct lifetime dip can be observed, which is directly correlated to
Qox and
Dit [
2]. Measurements may be performed by means of test structures like gate-controlled point-junction diodes [
2] and metal insulator systems with transparent gate [
3] or completely contactless using the corona-charged surface (CCS) approach [
4]. While the first two techniques suffer from the same disadvantages as capacitance-voltage measurements, i.e., the fabrication of test structures, the CCS approach is predestined to characterize the plain oxidation process. However, corona charging is still time-consuming and therefore unsuited if high throughput is required. Especially if only qualitative information, i.e., the process uniformity across the furnace, rather than quantitative values like
Qox and
Dit, are of interest.
Lifetime measurements may also be performed on oxidized substrates without any external modulation of the near-surface condition. From such measurements typically effective lifetimes are obtained, which depend on both bulk and interface recombination [
5]. However, with the correct substrate choice, the measured effective lifetime is heavily dominated by interface recombination and therefore reflects the oxide quality [
6]. In the present work, this approach is applied to investigate the oxidation homogeneity across single wafers as well as the entire oxidation furnace. Lifetime measurements are performed on oxidized float zone (FZ) substrates with high resistivity, which are known for extremely high bulk lifetimes. Due to this fact, the measured effective lifetime is clearly dominated by surface recombination, even if thermally grown oxides with very low interface densities are used for surface passivation [
6]. The applied approach does not require the fabrication of test structures and is therefore ideally suited to characterize every single wafer of a batch process, especially if only qualitative information about the process homogeneity is of interest. In addition, the quality of the plain oxidation process is obtained since no additional high temperature process steps are performed between oxidation and the actual measurements.
2. Materials and Methods
In order to prove that the lifetime measurements refer to the characteristics of the oxidation furnace and not to different substrate properties, a set of high-resistivity FZ substrates served as starting material for the present work. The wafers have similar resistivity ranges as well as identical surface orientation, but were produced out of three different ingots. Such material is typically used for detector or power applications and therefore expected to have an outstanding crystal quality. In addition, slightly doped substrates are advantageous for contactless lifetime measurement, since extremely high signal to noise ratios are obtained. Detailed material information can be found in
Table 1.
A thermal dry oxide of approximately 200 nm was grown on every wafer using a horizontal oxidation furnace. After the oxidation, in situ post oxidation annealing under nitrogen atmosphere was performed for 15 min in order to reduce fixed oxide charges as well as Si/SiO2 interface states. Both oxidation and post oxidation annealing were carried out at T = 1030 °C at atmospheric pressure. Ramp up and cool down were performed under oxygen and nitrogen atmosphere, respectively. Before every oxidation, a pre-oxidation clean was conducted in the furnace. All wafers were oxidized as delivered by the manufacturer, i.e., neither surface preparation nor cleaning was performed.
The oxidation process was split into five different runs, whereby every run contained only wafers from one single batch. In order to investigate the impact of furnace leakages on the oxide properties, two runs (
α and
β) were performed using a defective tube door sealing, i.e., leakage at the tube door was intentionally provoked. The other oxidation runs (
γ,
δ and
ε) were conducted using a proper tube door sealing. Apart from the intentionally provoked leakage, all process parameters were kept constant for every oxidation run. A detailed description and loading plan of each oxidation can be found in
Table 2. To avoid any systematic effect, which may be caused by material deviations across the ingot, the wafers were placed randomly with respect to the wafer number, i.e., ingot position, in the quartz boat. The latter has 50 slots, whereby slot 1 is the innermost quartz boat position and slot 50 is located next to the tube door. During the oxidation all slots were occupied, either by dummy wafers or FZ substrates.
Following the oxidation, a detailed lifetime analysis by means of the microwave detected photoconductivity (MDP) technique [
7] was conducted on every FZ wafer. In MDP, optical generation of excess carriers is performed until a steady state photoconductivity is reached (see
Figure 1). After the optical excitation is switched off, excess carriers decay, and cause a decrease of the measured photoconductivity. The lifetime is calculated from the observed exponential decay, whereby linear regression is performed between 75% and 25% of the signal height (see
Figure 1) [
8]. Rise and decay of the photoconductivity are measured by microwave absorption, therefore, the wafer to be measured is part of a resonant microwave cavity. Excitation is typically performed by means of different laser diodes. The schematic arrangement of an MDP measurement setup is depicted in
Figure 2. A detailed description of the MDP measurement principle can be found in Reference [
9].
The measured lifetime is typically an effective lifetime
τeff, which can be expressed by
where
τb is the bulk and
τs the surface or interface lifetime [
5]. In oxidized FZ material with outstanding crystal quality, the bulk lifetime
τb is expected to be significantly higher than the interface lifetime
τs [
6]. Thus, the measured effective lifetime
τeff is limited by surface recombination, which depends on the Si/SiO
2 interface state density
Dit, the fixed oxide charge
Qox, the capture cross section for electrons
σn, and holes
σp as well as the charge carrier concentration of electrons
ns and holes
ps at the surface [
2].
The diffusion length L is closely related to the effective lifetime and may be calculated according to the equation [
10]
Depending on the injection level,
D is either the minority carrier or the ambipolar diffusion coefficient [
5].
All lifetime measurements were performed on a commercially available MDPmap setup (Freiberg Instruments), which enables fast lifetime mappings on wafer scale. Optical excitation was performed by means of IR laser diodes (977 nm) with 0.5 mm spot diameter, which cover an optical generation rate ranging from 1.2 × 10
18 cm
−3 s
−1 to 5.6 × 10
21 cm
−3 s
−1. The optical generation rate
Gopt is calculated according to
where
d is the wafer thickness,
α the absorption coefficient and Φ(
x) the optical flux [
11].
The effective lifetime across every wafer was mapped with 2 mm raster resolution, whereby an edge exclusion of 5 mm was used. Depending on the wafer diameter, this results in approximately 1590 and 3850 measuring points, respectively. To ensure comparability, all mappings were performed with an optical generation rate of 5.6 × 1021 cm−3 s−1. After the wafer mapping, the median value as well as the 25–75% quantile, also known as interquartile range, were stored and used for further evaluation. In this context, the 25–75% quantile is defined as the difference between the third quartile and the first quartile, i.e., Q0.75–Q0.25.
Additionally, generation rate dependent lifetime measurements were performed at the center of each wafer, i.e., transients are recorded for different optical generation rates and the effective lifetime is subsequently extracted from each transient as shown in
Figure 1.
A typical measurement sequence, i.e., wafer mapping as well as generation rate dependent lifetime analysis, takes approximately 5 min.
For capacitance-voltage measurements, circular MOS capacitors with 1 mm2 Aluminum/Silicon (Al/Si) gate area were fabricated on several oxidized FZ wafers. Fabrication of MOS structures required the implantation of phosphorus in order to create ohmic contacts to the substrate as well as annealing in nitrogen and forming gas atmosphere. Capacitance-voltage analysis was performed across all test wafers using a B1500A Semiconductor Device Analyzer (Agilent). Measurements were carried out for gate voltages between −4 V and 4 V, either as plain quasi static measurement or by superimposing an alternating current (AC) signal with 5 kHz frequency and 75 mV effective amplitude to the direct current (DC) voltage. Before data evaluation, all capacitance-voltage data were corrected for parasitic effects such as series resistance and offset cable capacitance.
Depending on the applied voltage, different capacitance-voltage characteristics may be obtained. If a plain DC voltage is applied to the MOS capacitor, a so-called quasi static or low frequency behavior is observed. Si/SiO
2 interface states contribute to the measured low frequency capacitance
Clf and identical capacitances are observed under inversion and accumulation conditions, which are equal to the oxide capacitance
Cox. If a small high frequency signal is superimposed to the DC bias, the inversion capacitance may be determined by a modulated space charge region and interface traps may not contribute to the measured high frequency capacitance. However, the actual frequency at which high frequency behavior is observed strongly depends on the material properties. High frequency capacitance-voltage characteristics can be used to estimate the semiconductor doping density as well as the flatband voltage V
fb. The latter is related to the fixed oxide charge
Qox by the equation
where
φms is the metal-semiconductor work function difference [
5].
The Si/SiO
2 interface state density
Dit may be calculated from the expression
where
q is the elementary charge and
CS is the semiconductor capacitance that is not known a priori. The determination of
CS requires the knowledge of the relation between the gate voltage
VG and the surface potential
Φs, which is obtained by integration of the low frequency capacitance-voltage curve:
If integration is started at the flatband condition, i.e.,
VG1 =
Vfb, the integration constant Δ becomes 0 [
5].
5. Conclusions
In the present work, contactless lifetime measurements were performed to analyze the oxidation homogeneity across a horizontal oxidation furnace. Characterization was performed by means of various FZ substrates with high bulk quality, suggesting that the measured effective lifetime is strongly dominated by interface recombination and therefore reflects the oxide quality. The presented approach was successfully used to identify strong leaks, which were intentionally provoked. In addition, it was shown that even small inhomogeneities in an otherwise ideal oxidation process can be detected with a fast and simple measurement.
The applied approach requires neither test structure nor time consuming measurements and is therefore of particular interest if high throughput is required. Since wafers are not destroyed during the characterization, the analyzed material can even be used for further device fabrication.
Characterization is not limited to the MDP technique or FZ substrates. In principle other contactless lifetime measurement methods may be used in combination with high bulk lifetime materials.
The presented technique allows a fast and accurate furnace profiling with respect to non-uniform process parameters. Besides plain equipment characterization, the presented approach is suitable to optimize the oxidation process itself regarding different parameters like temperature, gas flow, pressure, or process time.