State-of-the-Art in Integrated Circuit Design

A special issue of Chips (ISSN 2674-0729).

Deadline for manuscript submissions: closed (15 December 2023) | Viewed by 7071

Special Issue Editors


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Guest Editor
Department of Electronics, Instituto Nacional de Astrofísica, Optica y Electrónica (INAOE), Tonantinztla, Puebla 72840, Mexico
Interests: analog signal processing; integrated circuits; optimization by meta-heuristics; fractional-order chaotic systems; security in internet of things; analog/RF and mixed-signal design automation tools
Special Issues, Collections and Topics in MDPI journals

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Guest Editor
Department of Electronics, Autonomous University of Tlaxcala, Av. Universidad No. 1, Tlaxcala 90070, Mexico
Interests: analog circuits; chaos; memristive system; symbolic analysis

Special Issue Information

Dear Colleagues,

Integrated circuits are ubiquitous in many engineering applications. Several challenges associated with circuit modeling and simulation, design automation, circuit synthesis, optimization, layout generation, Monte Carlo simulation, process variation analysis, corner analysis, fault diagnosis, and so on, were surmounted in their fabrication. Nowadays, a circuit designer can choose between different modern fabrication technologies to develop single-transistor amplifiers, active filters, systems on a chip mixing analog, and digital circuits that process continuous and discrete signals. Against this background, this Special Issue will collect works involving state-of-the-art techniques in the modeling and simulation of analog/digital circuits and the fabrication and application of integrated circuits and systems. Topics of interest include, but are not limited to:

  • Circuit theory and synthesis;
  • Linear and nonlinear circuits and systems;
  • Numerical/symbolic simulation of circuits and systems;
  • Electronic design automation;
  • Noise and distortion analysis;
  • Layout-aware;
  • Monte Carlo and process variation analysis;
  • Analog, digital, and mixed-signal design

Prof. Dr. Esteban Tlelo-Cuautle
Dr. Carlos Sánchez-López
Guest Editors

Manuscript Submission Information

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Keywords

  • FinFET, MOSFET, BJT
  • amplifier
  • combinational and sequential logic
  • active and digital filter
  • modeling and simulation
  • layout
  • circuit optimization

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Published Papers (2 papers)

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Research

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19 pages, 1733 KiB  
Article
Hybrid Inverter-Based Fully Differential Operational Transconductance Amplifiers
by Luís Henrique Rodovalho, Pedro Toledo, Farzad Mir and Farshad Ebrahimi
Chips 2023, 2(1), 1-19; https://doi.org/10.3390/chips2010001 - 6 Jan 2023
Cited by 3 | Viewed by 3566
Abstract
Inverter-based Operational Transconductance Amplifiers (OTAs) are versatile and friendly scalable analog circuit blocks. Especially for the new CMOS technological nodes, several recent applications have been extensively using them, ranging from Analog Front End (AFE) to analog-to-digital converters (ADC). This work tracks down the [...] Read more.
Inverter-based Operational Transconductance Amplifiers (OTAs) are versatile and friendly scalable analog circuit blocks. Especially for the new CMOS technological nodes, several recent applications have been extensively using them, ranging from Analog Front End (AFE) to analog-to-digital converters (ADC). This work tracks down the current advances in inverter-based OTAs design, comparing their basic fully differential structures, such as Nauta (N), Barthelemy (B), Vieru (V) and Mafredini (M) ones, and, in addition, mixing them up to propose new fully differential single-ended and two-stage hybrid versions. The new herein-proposed fully differential hybrid OTAs are the composition of Barthelemy/Nauta (B/N), Barthelemy/Manfredini (B/M), Nauta/Vieru (N/V), and Manfredini/Vieru (M/V) OTAs. All OTAs were designed using the same Global Foundries 180 nm open-source PDK and their performances are compared for post-layout simulations. Full article
(This article belongs to the Special Issue State-of-the-Art in Integrated Circuit Design)
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Review

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17 pages, 3872 KiB  
Review
Winner-Take-All and Loser-Take-All Circuits: Architectures, Applications and Analytical Comparison
by Ehsan Rahiminejad and Hamed Aminzadeh
Chips 2023, 2(4), 262-278; https://doi.org/10.3390/chips2040016 - 8 Nov 2023
Viewed by 1723
Abstract
Different winner-take-all (WTA) and loser-take-all (LTA) circuits are studied, and their operations are analyzed in this review. The exclusive operation of the current conveyor, binary tree, and time-domain WTA/LTA architectures, as the most important architectures reported in the literature, are compared from the [...] Read more.
Different winner-take-all (WTA) and loser-take-all (LTA) circuits are studied, and their operations are analyzed in this review. The exclusive operation of the current conveyor, binary tree, and time-domain WTA/LTA architectures, as the most important architectures reported in the literature, are compared from the perspectives of power consumption, speed, and precision. Full article
(This article belongs to the Special Issue State-of-the-Art in Integrated Circuit Design)
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