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Electronics
Special Issues
Design and Applications of Nonlinear Circuits and Systems
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Design and Applications of Nonlinear Circuits and Systems

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: closed (15 November 2024) | Viewed by 34687

Special Issue Editors

Prof. Dr. Costas Psychalinos

E-Mail Website
Guest Editor
Department of Physics, Electronics Laboratory, University of Patras, 26504 Patras, Greece
Interests: fractional-order circuits and systems; analog integrated circuits; fractional-order biomedical circuits; fractional-order filters
Special Issues, Collections and Topics in MDPI journals
Prof. Dr. Ahmed S. Elwakil

E-Mail Website
Guest Editor
1. Department of Electrical Engineering, University of Sharjah, Sharjah P.O. Box 27272, United Arab Emirates
2. Department of Electrical and Software Engineering, University of Calgary, Calgary, AB T2N 1N4, Canada
Interests: circuit theory; nonlinear circuits; fractional-order systems; bioimpedance; supercapacitors
Special Issues, Collections and Topics in MDPI journals
Prof. Dr. Abdelali El Aroudi

E-Mail Website
Guest Editor
Departament d´Enginyeria Electronica, Electrica i Automatica, Universitat Rovira i Virgili, Tarragona, Spain
Interests: power electronics; energy conversion systems; PV and EV applications of power electronics circuits; dynamics and control of energy conversion systems; harmonics mitigation; control systems; power factor correction; stability analysis; non-linear control; robust control; sliding mode control
Special Issues, Collections and Topics in MDPI journals
Prof. Dr. Esteban Tlelo-Cuautle

E-Mail Website
Guest Editor
Department of Electronics, Instituto Nacional de Astrofísica, Optica y Electrónica (INAOE), Tonantinztla, Puebla 72840, Mexico
Interests: analog signal processing; integrated circuits; optimization by meta-heuristics; fractional-order chaotic systems; security in internet of things; analog/RF and mixed-signal design automation tools
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

The development of nonlinear circuits and systems and the associated mathematical modeling is a topic of continuous research interest due to its highly interdisciplinary nature. The development of novel nonlinear circuit theoretical concepts has led to the development of many new applications in neuromorphic computing, power electronics and energy conversion, energy harvesting, cryptography, biomedical systems, and chaos control.

The aim of this Special Issue is to collect original research articles, as well as review articles, on the most recent developments and innovations in this field, with specific focus on multidisciplinary and interdisciplinary applied research.

The topics of interest include (but are not limited to):

  • Applications of nonlinear theory in energy conversion and power electronics;
  • Applications of nonlinear networks in control systems;
  • Applications of nonlinear systems in chaos, complexity, and optimization;
  • Applications of nonlinear systems in telecommunications and information theory;
  • Applications of nonlinear systems in cryptography and cybersecurity;
  • Applications of nonlinear systems in neuromorphic computing, biology/biomedicine, and computational bioinformatics;
  • Innovative applications of nonlinear circuit theory.

Prof. Dr. Costas Psychalinos
Prof. Dr. Ahmed Elwakil
Prof. Dr. Abdelali El Aroudi
Prof. Dr. Esteban Tlelo-Cuautle
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • energy conversion
  • power electronics
  • control systems
  • chaos
  • complexity
  • telecommunications
  • information theory
  • cryptography
  • cybersecurity
  • biological systems
  • biomedical systems

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Published Papers (20 papers)

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Research

12 pages, 3407 KiB  
Article
On the Behavior of a Non-Linear Bandpass Filter with Self Voltage-Controlled Resistors
by Ahmed S. Elwakil, Mohamed B. Elamien, Anis Allagui, Brent J. Maundy and Costas Psychalinos
Electronics 2024, 13(17), 3434; https://doi.org/10.3390/electronics13173434 - 29 Aug 2024
Viewed by 658
Abstract
In this work, we explore the behavior of a classical RLC resonance-based bandpass filter, which includes two resistors (one of which is associated with a non-ideal inductor), when either of these resistors is self voltage-controlled. In particular, self-feedback control is achieved by using [...] Read more.
In this work, we explore the behavior of a classical RLC resonance-based bandpass filter, which includes two resistors (one of which is associated with a non-ideal inductor), when either of these resistors is self voltage-controlled. In particular, self-feedback control is achieved by using the voltage developed across the inductor or the capacitor to dynamically change the value of the controlled resistor. This results in a multiplication-type non-linearity, which transforms the linear filter into a non-linear filter described by a set of non-linear differential equations. When gradually increasing the strength of the non-linearity, a notch-like behavior is observed at twice the resonance frequency. However, the non-linear filter can lose its stability with excessive feedback. Simulations and experimental results are provided to support the theory. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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13 pages, 3631 KiB  
Article
Influence of Post-Processing Techniques on Random Number Generation Using Chaotic Nanolasers
by Jing Zhao, Guopeng Liu, Rongkang Li and Penghua Mu
Electronics 2024, 13(14), 2712; https://doi.org/10.3390/electronics13142712 - 11 Jul 2024
Viewed by 553
Abstract
In this paper, we propose using a chaotic system composed of nanolasers (NLs) as a physical entropy source. Combined with post-processing technologies, this system can produce high-quality physical random number sequences. We investigated the parameter range for achieving time-delay signature (TDS) concealment in [...] Read more.
In this paper, we propose using a chaotic system composed of nanolasers (NLs) as a physical entropy source. Combined with post-processing technologies, this system can produce high-quality physical random number sequences. We investigated the parameter range for achieving time-delay signature (TDS) concealment in the chaotic system. This study demonstrates that NLs exhibit noticeable TDS only under optical feedback. As mutual injection strength between the master NLs (MNLs) increases, the TDS of the MNLs is gradually suppressed until they are completely concealed. Compared to MNLs, the slave NL (SNL) exhibits better TDS suppression performance. Additionally, we investigated the chaotic and highly unpredictable regions of the SNL, demonstrating that high-quality chaotic signals can be produced over a wide range of parameters. Using TDS hidden and highly unpredictable chaotic signals as the source of random entropy, the effects of different post-processing techniques on random number extraction were compared. The results indicate that effective post-processing can enhance the unpredictability of the random sequence. This study successfully utilized NLs for random number generation, showcasing the potential and application prospects of NLs in the field of random numbers. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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19 pages, 7516 KiB  
Article
Implementation of Buck DC-DC Converter as Built-In Chaos Generator for Secure IoT
by Sergejs Tjukovs, Daniils Surmacs, Juris Grizans, Chukwuma Victor Iheanacho and Dmitrijs Pikulins
Electronics 2024, 13(1), 20; https://doi.org/10.3390/electronics13010020 - 19 Dec 2023
Cited by 2 | Viewed by 1173
Abstract
Resource-constrained but widely deployed IoT devices require a new approach to ensure secure and reliable communications. That is why, in recent years, the paramount effort has been applied in lightweight cryptography. Because of its unpredictable nature, chaos is regarded as a potential candidate [...] Read more.
Resource-constrained but widely deployed IoT devices require a new approach to ensure secure and reliable communications. That is why, in recent years, the paramount effort has been applied in lightweight cryptography. Because of its unpredictable nature, chaos is regarded as a potential candidate in cryptographic applications. Chaos mode of operation is observed not only in deliberately designed oscillators but also in switching DC-DC converters, which are part of almost every embedded design. The use of a built-in chaos source may improve performance, energy consumption, PCB area, and cost of IoT devices. In this research, the regions of robust chaos were identified using numerical analysis, and the performance of a real buck DC-DC converter under peak-current-mode control was studied experimentally. It was shown that a compensating ramp acts as a switch between different operating regimes. Despite minor performance degradation, chaos mode can be used for secure communications in IoT networks. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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19 pages, 19761 KiB  
Article
Dynamical Analysis of a Memristive Chua’s Oscillator Circuit
by Christos Volos
Electronics 2023, 12(23), 4734; https://doi.org/10.3390/electronics12234734 - 22 Nov 2023
Cited by 5 | Viewed by 1254
Abstract
In this work, a novel memristive Chua’s oscillator circuit is presented. In the proposed circuit, a linear negative resistor, which is parallel coupled with a first-order memristive diode bridge, is used instead of the well-known Chua’s diode. Following this, an extensive theoretical and [...] Read more.
In this work, a novel memristive Chua’s oscillator circuit is presented. In the proposed circuit, a linear negative resistor, which is parallel coupled with a first-order memristive diode bridge, is used instead of the well-known Chua’s diode. Following this, an extensive theoretical and dynamical analysis of the circuit is conducted. This involves numerical computations of the system’s phase portraits, bifurcation diagrams, Lyapunov exponents, and continuation diagrams. A comprehensive comparison is made between the numerical simulations and the circuit’s simulations performed in Multisim. The analysis reveals a range of intriguing phenomena, including the route to chaos through a period-doubling sequence, antimonotonicity, and coexisting attractors, all of which are corroborated by the circuit’s simulation in Multisim. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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27 pages, 6167 KiB  
Article
A Unified Switched Nonlinear Dynamic Model of an Electric Vehicle for Performance Evaluation
by Dibyendu Khan, Kuntal Mandal, Anjan Kumar Ray and Abdelali El Aroudi
Electronics 2023, 12(14), 3173; https://doi.org/10.3390/electronics12143173 - 21 Jul 2023
Viewed by 1472
Abstract
The advanced modeling and estimation of overall system dynamics play a vital role in electric vehicles (EVs), as the selection of components in the powertrain and prediction of performance are the key market qualifiers. The state-space averaged model and small-signal transfer function model [...] Read more.
The advanced modeling and estimation of overall system dynamics play a vital role in electric vehicles (EVs), as the selection of components in the powertrain and prediction of performance are the key market qualifiers. The state-space averaged model and small-signal transfer function model are useful for assessing long-term behavior in system-level analysis and for designing the controller parameters, respectively. Both models take less computation time but ignore the high-frequency switching dynamics. Therefore, these two models could be impractical for the development and testing of EV prototypes. On the other hand, the multi-domain model in available simulation tools gives in-depth information about the short-term behavior and loss analysis of power electronic devices in each subsystem, considering the switching dynamics in a long computation time. In this paper, a general mathematical framework for the dynamical analysis of complete EVs is presented using a unified, switched nonlinear model. This equation-based model runs faster than the available module-based simulation tools. Two other models, namely the time domain state-space averaged model and frequency domain small-signal transfer function model, are also developed from the switched nonlinear model for the analysis with less computation time. The design and performance of an EV with two different motors and its controllers are evaluated using the general mathematical framework. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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13 pages, 6630 KiB  
Article
A Multistable Discrete Memristor and Its Application to Discrete-Time FitzHugh–Nagumo Model
by Mohd Taib Shatnawi, Amina Aicha Khennaoui, Adel Ouannas, Giuseppe Grassi, Antonio V. Radogna, Anwar Bataihah and Iqbal M. Batiha
Electronics 2023, 12(13), 2929; https://doi.org/10.3390/electronics12132929 - 3 Jul 2023
Cited by 12 | Viewed by 1480
Abstract
This paper presents a multistable discrete memristor that is based on the discretization of a continuous-time model. It has been observed that the discrete memristor model is capable of preserving the characteristics of the continuous memristor model. Furthermore, a three-dimensional memristor discrete-time FitzHugh–Nagumo [...] Read more.
This paper presents a multistable discrete memristor that is based on the discretization of a continuous-time model. It has been observed that the discrete memristor model is capable of preserving the characteristics of the continuous memristor model. Furthermore, a three-dimensional memristor discrete-time FitzHugh–Nagumo model is constructed by integrating the discrete memristor into a two-dimensional FitzHugh–Nagumo (FN) neuron model. Subsequently, the dynamic behavior of the proposed neuron model is analyzed through Lyapunov exponents, phase portraits, and bifurcation diagrams. The results show multiple kinds of coexisting hidden attractor behaviors generated by this neuron model. The proposed approach is expected to have significant implications for the design of advanced neural networks and other computational systems, with potential applications in various fields, including robotics, control, and optimization. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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15 pages, 10320 KiB  
Article
Complete Bifurcation Analysis of the Vilnius Chaotic Oscillator
by Aleksandrs Ipatovs, Iheanacho Chukwuma Victor, Dmitrijs Pikulins, Sergejs Tjukovs and Anna Litvinenko
Electronics 2023, 12(13), 2861; https://doi.org/10.3390/electronics12132861 - 28 Jun 2023
Viewed by 1175
Abstract
The paper is dedicated to the numerical and experimental study of nonlinear oscillations exhibited by the Vilnius chaotic generator. The motivation for the work is defined by the need for a comprehensive analysis of the dynamics of the oscillators being embedded into chaotic [...] Read more.
The paper is dedicated to the numerical and experimental study of nonlinear oscillations exhibited by the Vilnius chaotic generator. The motivation for the work is defined by the need for a comprehensive analysis of the dynamics of the oscillators being embedded into chaotic communication systems. These generators should provide low-power operation while ensuring the robustness of the chaotic oscillations, insusceptible to parameter variations and noise. The work focuses on the investigation of the dependence of nonlinear dynamics of the Vilnius oscillator on the operating voltage and component parameter changes. The paper shows that the application of the Method of Complete Bifurcation Groups reveals the complex smooth and non-smooth bifurcation structures, forming regions of robust chaotic oscillations. The novel tool—mode transition graph—is presented, allowing the comparison of experimental and numerical results. The paper demonstrates the applicability of the Vilnius oscillator for the generation of robust chaos, and highlights the need for further investigation of the inherent trade-off between energy efficiency and robustness of the obtained oscillations. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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22 pages, 17233 KiB  
Article
A Novel 3-D Jerk System, Its Bifurcation Analysis, Electronic Circuit Design and a Cryptographic Application
by Sundarapandian Vaidyanathan, Alain Soup Tewa Kammogne, Esteban Tlelo-Cuautle, Cédric Noufozo Talonang, Bassem Abd-El-Atty, Ahmed A. Abd El-Latif, Edwige Mache Kengne, Vannick Fopa Mawamba, Aceng Sambas, P. Darwin and Brisbane Ovilla-Martinez
Electronics 2023, 12(13), 2818; https://doi.org/10.3390/electronics12132818 - 26 Jun 2023
Cited by 7 | Viewed by 1605
Abstract
This paper introduces a new chaotic jerk system with three cubic nonlinear terms. The stability properties of the three equilibrium points of the proposed jerk system are analyzed in detail. We show that the three equilibrium points of the new chaotic jerk system [...] Read more.
This paper introduces a new chaotic jerk system with three cubic nonlinear terms. The stability properties of the three equilibrium points of the proposed jerk system are analyzed in detail. We show that the three equilibrium points of the new chaotic jerk system are unstable and deduce that the jerk system exhibits self-excited chaotic attractors. The bifurcation structures of the proposed jerk system are investigated numerically, showing period-doubling, periodic windows and coexisting bifurcations. An electronic circuit design of the proposed jerk system is designed using PSPICE. As an engineering application, a new image-encryption approach based on the new chaotic jerk system is presented in this research work. Experimental results demonstrate that the suggested encryption mechanism is effective with high plain-image sensitivity and the reliability of the proposed chaotic jerk system for various cryptographic purposes. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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14 pages, 5557 KiB  
Article
Complex Dynamics in Digital Nonlinear Oscillators: Experimental Analysis and Verification
by Tommaso Addabbo, Ada Fort, Riccardo Moretti, Filippo Spinelli and Valerio Vignoli
Electronics 2023, 12(11), 2459; https://doi.org/10.3390/electronics12112459 - 30 May 2023
Viewed by 1194
Abstract
A specific topology of Digital Nonlinear Oscillators (DNOs) has been implemented by using commercial off-the-shelf digital components to experimentally verify and demonstrate the capability of these circuits to support complex dynamics, independently from their implementation technology. In detail, a direct experimental evidence of [...] Read more.
A specific topology of Digital Nonlinear Oscillators (DNOs) has been implemented by using commercial off-the-shelf digital components to experimentally verify and demonstrate the capability of these circuits to support complex dynamics, independently from their implementation technology. In detail, a direct experimental evidence of the DNO dynamical behavior is presented at the analog level with a bifurcation diagram analysis, investigation of periodic and chaotic attractors, and dynamical stability. The autonomous circuit has been investigated as a source of entropy, adopting different figures of merit, including the Lempel–Ziv Complexity, to evaluate the dynamics measured under different operating conditions. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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23 pages, 8449 KiB  
Article
Bifurcation Phenomena in Open-Loop DCM-Operated DC–DC Switching Converters Feeding Constant Power Loads
by Abdelali El Aroudi, Luis Benadero, Reham Haroun, Luis Martínez-Salamero and Chi K. Tse
Electronics 2023, 12(4), 1030; https://doi.org/10.3390/electronics12041030 - 19 Feb 2023
Cited by 1 | Viewed by 1837
Abstract
Constant power loading is an effect that appears in multiple-stage energy conversion systems with individually regulated switching power converters. In a two-stage system, an upstream or source converter drives one or more downstream or load converters. The downstream converters in a two-stage power [...] Read more.
Constant power loading is an effect that appears in multiple-stage energy conversion systems with individually regulated switching power converters. In a two-stage system, an upstream or source converter drives one or more downstream or load converters. The downstream converters in a two-stage power conversion system are designed to provide the fastest transient response in stand-alone operation. Consequently, they behave as a constant power load (CPL) to the upstream converter within their control bandwidth. In the past, open-loop power converters feeding CPLs and operating in discontinuous conduction mode (DCM) were considered to be stable. In this paper, it is shown that these systems can undergo instabilities, which have been so far overlooked. First, numerical simulations from the switched model of an open-loop boost converter under DCM operation and loaded with a tightly regulated buck converter and the same converter loaded by an ideal CPL are presented to show that they exhibit similar nonlinear behavior and bifurcation phenomena. Then, the three elementary open-loop DC–DC converters operating in the DCM were considered and their bifurcation phenomena were revealed. It is shown that the period-doubling route to chaos in the DC–DC boost converter is interrupted by a sudden appearance of dangerous destructive dynamics due to the excessively unlimited load current in the CPL. For the buck converter, only the first period-doubling bifurcation is observed before the destructive behavior appears. The open-loop buck–boost converter under DCM and feeding a CPL is always unstable and exhibits no periodic orbit. Based on the observed phenomena, approximate discrete-time models were derived, which despite their simplicity, were seen to display the most-important and -essential features of the corresponding switching converters before destructive dynamics occurs. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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12 pages, 4529 KiB  
Article
Emerging Spiral Waves and Coexisting Attractors in Memductance-Based Tabu Learning Neurons
by Balakrishnan Sriram, Zeric Njitacke Tabekoueng, Anitha Karthikeyan and Karthikeyan Rajagopal
Electronics 2022, 11(22), 3685; https://doi.org/10.3390/electronics11223685 - 10 Nov 2022
Cited by 2 | Viewed by 1493
Abstract
Understanding neuron function may aid in determining the complex collective behavior of brain systems. To delineate the collective behavior of the neural network, we consider modified tabu learning neurons (MTLN) with magnetic flux. Primarily, we explore the rest points and stability of the [...] Read more.
Understanding neuron function may aid in determining the complex collective behavior of brain systems. To delineate the collective behavior of the neural network, we consider modified tabu learning neurons (MTLN) with magnetic flux. Primarily, we explore the rest points and stability of the isolated MTLN, as well as its dynamical characteristics using maximal Lyapunov exponents. Surprisingly, we discover that for a given set of parameter values with distinct initial conditions, the periodic and the chaotic attractors may coexist. In addition, experimental analysis is carried out using a microcontroller-based implementation technique to support the observed complex behavior of the MTLN. We demonstrate that the observed numerical results are in good agreement with the experimental verification. Eventually, the collective behaviors of the considered MTLN are investigated by extending them to the network of the lattice array. We discover that when the magnetic flux coupling coefficient is varied in the presence of an external stimulus, the transition from spiral waves to traveling plane waves occurs. Finally, we manifest the formation of spiral waves in the absence of an external stimulus in contrast to previous observations. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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11 pages, 1904 KiB  
Article
A 60GS/s Two-Stage Sampler with a Linearity Calibration Loop for PAM-8 Receivers
by Alessio Di Pasquo, Enrico Monaco, Nicola Ghittori, Claudio Nani and Luca Fanucci
Electronics 2022, 11(21), 3484; https://doi.org/10.3390/electronics11213484 - 27 Oct 2022
Viewed by 1397
Abstract
In this article, we show a 60 GS/s two-stage 8 × 8 time-interleaved sampling circuit, where the second-stage nonlinearity can be controlled by using the voltage that optimizes the static distortions of the sampler. A calibration algorithm can extract the nonlinear contributions of [...] Read more.
In this article, we show a 60 GS/s two-stage 8 × 8 time-interleaved sampling circuit, where the second-stage nonlinearity can be controlled by using the voltage that optimizes the static distortions of the sampler. A calibration algorithm can extract the nonlinear contributions of the stages and compensate for them by setting the optimal bias voltage. This can also be used to cancel the front-end nonlinear effects. The sampler was verified by implementing it in TSMC 5 nm FinFET, and a calibration system in a Pulse Amplitude Modulation transceiver, detecting and minimizing the nonlinearities, is presented. The optimum voltage biasing of the sampler was obtained by co-simulating the circuit with the linearity calibration loop implemented in Verilog-A. The histogram of the sampled signal at the slicer input is shown before and after the calibration to show the improvement in the sampled eye opening. Moreover, the resulting bias is equal to the one that maximizes the total harmonic distortion in transient simulations with a 1 GHz input signal, obtaining a minimum of 48.5 dB of total harmonic distortion across different PVT conditions. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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13 pages, 4607 KiB  
Article
Local and Network Dynamics of a Non-Integer Order Resistor–Capacitor Shunted Josephson Junction Oscillators
by Sathiyadevi Kanagaraj, Premraj Durairaj, A. Amalin Prince and Karthikeyan Rajagopal
Electronics 2022, 11(18), 2812; https://doi.org/10.3390/electronics11182812 - 6 Sep 2022
Cited by 3 | Viewed by 1294
Abstract
Spiral waves are an intriguing phenomenon that can be found in a variety of chemical and biological systems. We consider the fractional-order resistor–capacitor shunted Josephson junction chaotic oscillator to investigate the spiral wave pattern. For a preliminary understanding, we look at the dynamics [...] Read more.
Spiral waves are an intriguing phenomenon that can be found in a variety of chemical and biological systems. We consider the fractional-order resistor–capacitor shunted Josephson junction chaotic oscillator to investigate the spiral wave pattern. For a preliminary understanding, we look at the dynamics of isolated FJJs and show that infinitely coexisting periodic and chaotic attractors depend on the fractional order. In addition, we perform bifurcation analysis to show the dynamical transition of the attractors as a function of fractional order and basin stability analysis to show the infinitely coexisting attractors. This is followed by the existence of spiral waves which is observed under various intrinsic and extrinsic system parameters. Finally, the impact of noise on SW is also analyzed by dispersing it to the entire stimulation period or defined time-period. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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10 pages, 4472 KiB  
Article
A Track-and-Hold Circuit with Tunable Non-Linearity and a Calibration Loop for PAM-8 SerDes Receivers
by Alessio Di Pasquo, Enrico Monaco, Nicola Ghittori, Claudio Nani and Luca Fanucci
Electronics 2022, 11(14), 2199; https://doi.org/10.3390/electronics11142199 - 13 Jul 2022
Cited by 2 | Viewed by 1863
Abstract
In this brief, we propose a 60 GS/s high-linearity two-stage 8 × 8 time-interleaved track-and-hold circuit where it is possible to tune the static non-linearities of the second-stage buffer by applying a proper bias voltage. This allows us to maximize the static linearity [...] Read more.
In this brief, we propose a 60 GS/s high-linearity two-stage 8 × 8 time-interleaved track-and-hold circuit where it is possible to tune the static non-linearities of the second-stage buffer by applying a proper bias voltage. This allows us to maximize the static linearity of the buffer or introduce effects that counterbalance the non-linearities of other blocks of the analog front-end. To validate the proposed circuit, a prototype in TSMC 5 nm technology is designed and a linearity calibration loop is proposed for a Pulse Amplitude Modulation SerDes receiver. For the analog buffer, circuit-level simulations are performed in Cadence Virtuoso, while the calibration loop is simulated in MATLAB. The optimal bias voltage value can be found by modeling the track-and-hold linearity using a Taylor series and implementing the linearity calibration loop in MATLAB. By applying this result to the circuit-level simulation, we obtain a total harmonic distortion of over 50 dB, which matches with the maximum value achievable across the complete bias voltage control range. Lastly, the linearity of the system is also verified using a PAM-8 pseudorandom stream signal. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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11 pages, 9057 KiB  
Article
A Unified FPGA Realization for Fractional-Order Integrator and Differentiator
by Mohamed S. Monir, Wafaa S. Sayed, Ahmed H. Madian, Ahmed G. Radwan and Lobna A. Said
Electronics 2022, 11(13), 2052; https://doi.org/10.3390/electronics11132052 - 29 Jun 2022
Cited by 5 | Viewed by 2060
Abstract
This paper proposes a generic FPGA realization of an IP core for fractional-order integration and differentiation based on the Grünwald–Letnikov approximation. All fractional-order dependent terms are approximated to simpler relations using curve fitting to enable an efficient hardware realization. Compared to previous works, [...] Read more.
This paper proposes a generic FPGA realization of an IP core for fractional-order integration and differentiation based on the Grünwald–Letnikov approximation. All fractional-order dependent terms are approximated to simpler relations using curve fitting to enable an efficient hardware realization. Compared to previous works, the proposed design introduces enhancements in the fractional-order range covering both integration and differentiation. An error analysis between software and hardware results is presented for sine, triangle and sawtooth signals. The proposed generic design is realized on XC7A100T FPGA achieving frequency of 9.328 MHz and validated experimentally for a sine input signal on the oscilloscope. The proposed unified generic design is suitable for biomedical signal processing applications. In addition, it can be employed as a laboratory tool for fractional calculus education. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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12 pages, 5638 KiB  
Article
A 1-to-3 GHz 5-to-512 Multiplier Adaptive Fast-Locking Self-Biased PLL in 28 nm CMOS
by Binghui Wang, Haigang Yang and Yiping Jia
Electronics 2022, 11(13), 1954; https://doi.org/10.3390/electronics11131954 - 22 Jun 2022
Cited by 5 | Viewed by 1884
Abstract
Based on a self-biased architecture, this paper presents a novel adaptive fast-locking, wide operating range and low-jitter phase-locked loop (PLL). A current injection and adaptive bandwidth technology with minimum area overhead is employed to speed up the loop equilibrium acquisition process, without any [...] Read more.
Based on a self-biased architecture, this paper presents a novel adaptive fast-locking, wide operating range and low-jitter phase-locked loop (PLL). A current injection and adaptive bandwidth technology with minimum area overhead is employed to speed up the loop equilibrium acquisition process, without any adverse impact on the steady-state loop dynamics and the jitter performance. The proposed start-up circuit resets the loop to an appropriate initial state in order to shorten the initial ramp-up interval of the voltage-controlled oscillator (VCO), also resulting in cutting down the pull-in time. In addition, a proportional factor is introduced to give some kind of flexibility in the circuit design optimization. The proposed adaptive fast-locking self-biased PLL (AFL-SPLL) is designed and realized in a prototype based on TSMC 28 nm CMOS process, having a supply voltage of 0.9 V and an area of 0.0281 mm2. This PLL demonstrates a tuning range of 1 to 3 GHz and power consumptions from 0.91 mW at 1 GHz to 4.6 mW at 3 GHz operating frequency. The experimental results show that the capture process has been accelerated by up to 84.7% over large division ratios, yet the capture performance did not deteriorate at all for small division ratios. Meanwhile, the circuit implementation gave almost no area increase and yet achieved a reduction in the lock-in time of about 6.5 times, namely from 23.5 μs (without the adaptive locking) to only 3.6 μs (with the adaptive locking) on the maximum operation frequency condition of 3 GHz. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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18 pages, 2219 KiB  
Article
Antimonotonicity, Hysteresis and Coexisting Attractors in a Shinriki Circuit with a Physical Memristor as a Nonlinear Resistor
by Lazaros Laskaridis, Christos Volos and Ioannis Stouboulos
Electronics 2022, 11(12), 1920; https://doi.org/10.3390/electronics11121920 - 20 Jun 2022
Cited by 6 | Viewed by 2326
Abstract
A novel approach to the physical memristor’s behavior of the KNOWM is presented in this work. The KNOWM’s memristor’s intrinsic feature encourages its use as a nonlinear resistor in chaotic circuits. Furthermore, this memristor has been shown to act like a static nonlinear [...] Read more.
A novel approach to the physical memristor’s behavior of the KNOWM is presented in this work. The KNOWM’s memristor’s intrinsic feature encourages its use as a nonlinear resistor in chaotic circuits. Furthermore, this memristor has been shown to act like a static nonlinear resistor under certain situations. Consequently, for the first time, the KNOWM memristor is used as a static nonlinear resistor in the well-known chaotic Shinriki oscillator. In order to examine the circuit’s dynamical behavior, a host of nonlinear simulation tools, such as phase portraits, bifurcation and continuation diagrams, as well as a maximal Lyapunov exponent diagram, are used. Interesting phenomena related to chaos theory are observed. More specifically, the entrance to chaotic behavior through the antimonotonicity phenomenon is observed. Furthermore, the hysteresis phenomenon, as well as the existence of coexisting attractors in regards to the initial conditions and the parameters of the system, are investigated. Moreover, the period-doubling route to chaos and crisis phenomena are observed too. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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23 pages, 7250 KiB  
Article
FPGA-Based Antipodal Chaotic Shift Keying Communication System
by Filips Capligins, Anna Litvinenko, Deniss Kolosovs, Maris Terauds, Maris Zeltins and Dmitrijs Pikulins
Electronics 2022, 11(12), 1870; https://doi.org/10.3390/electronics11121870 - 14 Jun 2022
Cited by 8 | Viewed by 2348
Abstract
The current work presents a novel digital chaotic communication system with antipodal chaotic shift keying modulation, implemented in a field-programmable gate array (FPGA). Such systems provide high security on the physical communication level and can be used in wireless sensor network systems. A [...] Read more.
The current work presents a novel digital chaotic communication system with antipodal chaotic shift keying modulation, implemented in a field-programmable gate array (FPGA). Such systems provide high security on the physical communication level and can be used in wireless sensor network systems. A modified Chua circuit chaos generator and error linear feedback chaotic synchronization are implemented in FPGA and used to develop a chaotic communication system with digital transmitter and receiver an analog in-between signal transmission. Additionally, a validated mathematical model of the communication system prototype is created in the Simulink environment, which is used to compare the performance of the prototype and its nodes with the simulation and simplify its development. The performance is evaluated using simulation with the additive white Gaussian noise channel and analyzing the bit error ratio. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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17 pages, 4824 KiB  
Article
Experimental Study on FM-CSK Communication System for WSN
by Darja Cirjulina, Dmitrijs Pikulins, Ruslans Babajans, Maris Zeltins, Deniss Kolosovs and Anna Litvinenko
Electronics 2022, 11(10), 1517; https://doi.org/10.3390/electronics11101517 - 10 May 2022
Cited by 8 | Viewed by 1941
Abstract
The current paper presents the experimental study of the frequency-modulated chaos shift keying (FM-CSK) communication system. The proposed system has the potential to enhance the security aspects of the physical layer to meet the needs for safe data transmission in wireless sensor networks [...] Read more.
The current paper presents the experimental study of the frequency-modulated chaos shift keying (FM-CSK) communication system. The proposed system has the potential to enhance the security aspects of the physical layer to meet the needs for safe data transmission in wireless sensor networks (WSN). Compared to common digital FM-DCSK, the studied analog FM-CSK communication system provides a more straightforward design. As chaos oscillators are the core elements of the FM-CSK communication system, the paper investigates the selected oscillators’ properties, including the implementation aspects—the impact of reactive element value deviations on dynamics and synchronization stability. Chaotic dynamics are evaluated with the mean-square-displacement-based 0–1 test, while correlation analysis is used to evaluate synchronization. The impact of the different chaos oscillators’ employment on FM-CSK communication system performance is examined, and the bit error ratio is used for noise immunity evaluation. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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11 pages, 3048 KiB  
Article
Versatile Field-Programmable Analog Array Realizations of Power-Law Filters
by Stavroula Kapoulea, Costas Psychalinos and Ahmed S. Elwakil
Electronics 2022, 11(5), 692; https://doi.org/10.3390/electronics11050692 - 24 Feb 2022
Cited by 8 | Viewed by 2051
Abstract
A structure suitable for implementing power-law low-pass and high-pass filter transfer functions is presented in this work. Through the utilization of a field-programmable analog array device, full programmability of the characteristics of the intermediate stages, as is required for realizing the rational integer-order [...] Read more.
A structure suitable for implementing power-law low-pass and high-pass filter transfer functions is presented in this work. Through the utilization of a field-programmable analog array device, full programmability of the characteristics of the intermediate stages, as is required for realizing the rational integer-order transfer function that approximates the corresponding power-law function, was achieved, making the structure versatile. In addition, a comparison between power-law and fractional-order filters regarding the effect of the non-integer order was performed. The presented design examples are fully supported by experimental results. Full article
(This article belongs to the Special Issue Design and Applications of Nonlinear Circuits and Systems)
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