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Micromachines
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Latest Advancements in Semiconductor Materials, Devices, and Systems
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Latest Advancements in Semiconductor Materials, Devices, and Systems

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: closed (20 November 2024) | Viewed by 22710

Special Issue Editors

Dr. Zeheng Wang

E-Mail Website
Guest Editor
The Commonwealth Scientific and Industrial Research Organisation (CSIRO), Building 101, Clunies Ross Street, Black Mountain, ACT 2601, Australia
Interests: semiconductor devices; quantum computing; nanofabrication; machine learning
Special Issues, Collections and Topics in MDPI journals
Dr. Jing-Kai Huang

E-Mail Website
Guest Editor
1. School of Materials Science, The City University of Hong Kong, Road to Kowloon, Hong Kong 999077, China
2. School of Materials Science and Engineering, University of New South Wales, Sydney, NSW 2052, Australia
Interests: 2D materials; nanotechnology; semiconductor devices
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

The semiconductor domain is experiencing a paradigm shift as the boundaries of Moore's Law are being approached. While the exploration of next-generation semiconductors, such as 2D materials and wide bandgap semiconductors, continues to unfold new horizons for electronic devices, advancements in traditional semiconductors such as Silicon (Si) and Germanium (Ge) remain crucial for current and emerging technologies. These advancements, in conjunction with sophisticated modeling, simulation, and fabrication techniques, are paving the way for remarkable innovations not only in materials and devices but also in circuits and systems, thus enriching the semiconductor research landscape.

This Special Issue, titled "Latest Advancements in Semiconductor Materials, Devices, and Systems" aims to create a comprehensive platform for researchers to share their state-of-the-art results. We welcome contributions in the form of research papers, communications, and review articles that shed light on contemporary developments in both traditional and next-generation semiconductors and their integration into innovative devices, circuits, and systems.

We cordially invite submissions on a wide array of topics, including, but not limited to, the following:

  1. Novel device structures, processes, and models.
  2. Material synthesis, characterizations, and heterojunctions, involving Si, Ge, GaAs, layered transition metal chalcogenides, graphene, black phosphorus, III-V, SiC, ZnO, Ga2O3, diamond, and others.
  3. Numerical studies and simulations exploring the behavior and application of both traditional and advanced semiconductors.
  4. Innovative circuit designs and system-level integrations.
  5. Machine learning applications in optimizing semiconductor functionalities.
  6. Advanced computing paradigms (neural computing, in-memory computing, and quantum computing) enabled by modern semiconductor technologies.

This Special Issue will serve as an exciting venue for disseminating pioneering work and fostering discussions that could guide future directions in the semiconductor field. We eagerly anticipate your valuable submissions and look forward to an enlightening discourse on the latest advancements encompassing semiconductor materials, devices, circuits, and systems.

We look forward to receiving your submissions.

Dr. Zeheng Wang
Dr. Jing-Kai Huang
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • semiconductors
  • fabrication
  • simulation
  • circuits
  • systems
  • machine learning

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Related Special Issue

Published Papers (10 papers)

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Research

Jump to: Review

11 pages, 3345 KiB  
Article
Performance Improvement of TiO2 Ultraviolet Photodetectors by Using Atomic Layer Deposited Al2O3 Passivation Layer
by Yao-Tsung Yang, Shih-Chin Lin, Ching-Chiun Wang, Ying-Rong Ho, Jian-Zhi Chen and Jung-Jie Huang
Micromachines 2024, 15(11), 1402; https://doi.org/10.3390/mi15111402 - 20 Nov 2024
Viewed by 257
Abstract
This study employed atomic layer deposition (ALD) to fabricate an Al2O3 passivation layer to optimize the performance of ultraviolet (UV) photodetectors with a TiO2-nanorod-(NR)-containing active layer and a solid–liquid heterojunction (SLHJ). To reduce the processing time and enhance [...] Read more.
This study employed atomic layer deposition (ALD) to fabricate an Al2O3 passivation layer to optimize the performance of ultraviolet (UV) photodetectors with a TiO2-nanorod-(NR)-containing active layer and a solid–liquid heterojunction (SLHJ). To reduce the processing time and enhance light absorption, a hydrothermal method was used to grow a relatively thick TiO2-NR-containng working electrode. Subsequently, a 5-nm-thick Al2O3 passivation layer was deposited on the TiO2 NRs through ALD, which has excellent step coverage, to reduce the surface defects in the TiO2 NRs and improve the carrier transport efficiency. X-ray photoelectron spectroscopy revealed that the aforementioned layer reduced the defects in the TiO2 NRs. Moreover, high-resolution transmission electron microscopy indicated that following the annealing treatment, Al, Ti, and O atoms diffused across the interface between the Al2O3 passivation layer and TiO2 NRs, resulting in the binding of these atoms to form Al–Ti–O bonds. This process effectively filled the oxygen vacancies in TiO2. Examination of the photodetector device revealed that the photocurrent-to-dark current ratio exhibited a difference of four orders of magnitude (10−4 to 10−8 A), with the switch-on and switch-off times being 0.46 and 3.84 s, respectively. These results indicate that the Al2O3 passivation layer deposited through ALD can enhance the photodetection performance of SLHJ UV photodetectors with a TiO2 active layer. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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13 pages, 1844 KiB  
Article
Internally Harmonic Matched Compact GaN Power Amplifier with 78.5% PAE for 2.45 GHz Wireless Power Transfer Systems
by Caoyu Li, Ziliang Zhang, Yi Pei, Changchang Chen, Gang Feng and Yuehang Xu
Micromachines 2024, 15(11), 1354; https://doi.org/10.3390/mi15111354 - 6 Nov 2024
Viewed by 566
Abstract
In this paper, a high-efficiency compact power amplifier is designed and fabricated with a 0.25 μm GaN high electron mobility transistor (HEMT) to meet the demands of a high integration level and high efficiency for microwave wireless power transfer (WPT) systems. The proposed [...] Read more.
In this paper, a high-efficiency compact power amplifier is designed and fabricated with a 0.25 μm GaN high electron mobility transistor (HEMT) to meet the demands of a high integration level and high efficiency for microwave wireless power transfer (WPT) systems. The proposed power amplifier (PA) is implemented using an internally matched method to achieve a compact circuit size. The output second and third harmonic impedances can be optimized through output matching circuits, eliminating the need for additional harmonic matching networks. This approach simplifies the design of matching circuits and reduces the circuit size. Furthermore, the input third harmonic has been controled for improving the efficiency of DC-to-RF conversion. The total size of the proposed PA is 13.4 × 13.5 mm2. The test results obtained from the continuous wave (CW) testing indicate that the output power of the power amplifier at 2.45 GHz reaches 43.75 dBm. Additionally, the large-signal gain is measured at 15.75 dB, and the power-added efficiency (PAE) achieves a value of 78.5%. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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10 pages, 1650 KiB  
Article
A Sub-1 ppm/°C Reference Voltage Source with a Wide Input Range
by Yuchi Xiao, Chunlai Wang, Hongyang Hou and Weihua Han
Micromachines 2024, 15(10), 1273; https://doi.org/10.3390/mi15101273 - 21 Oct 2024
Viewed by 632
Abstract
With the continuous advancement of electronic technology, the application of high-voltage integrated circuits is becoming increasingly prevalent in fields such as power systems, medical devices, and industrial automation. The reference circuit within high-voltage integrated circuits must not only exhibit insensitivity to temperature variations [...] Read more.
With the continuous advancement of electronic technology, the application of high-voltage integrated circuits is becoming increasingly prevalent in fields such as power systems, medical devices, and industrial automation. The reference circuit within high-voltage integrated circuits must not only exhibit insensitivity to temperature variations but also maintain stability across a broad voltage supply. This paper presents a bandgap reference (BGR) source capable of operating over a wide input range. This BGR employs a high-order curvature compensation method to eliminate nonlinear voltage terms, resulting in minimal temperature drift. The circuit achieves an impressive temperature coefficient (TC) of 0.88 ppm/°C over a temperature range from −40 °C to 130 °C. To ensure stable operation within a 4–40 V range, the design incorporates a pre-regulation circuit that stabilizes the supply voltage of the BGR core at a fixed value, thereby enhancing the ability to withstand variations in power supply voltage. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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16 pages, 8438 KiB  
Article
A Study on the Frequency-Domain Black-Box Modeling Method for the Nonlinear Behavioral Level Conduction Immunity of Integrated Circuits Based on X-Parameter Theory
by Xi Chen, Shuguo Xie, Mengyuan Wei and Yan Yang
Micromachines 2024, 15(5), 658; https://doi.org/10.3390/mi15050658 - 17 May 2024
Viewed by 945
Abstract
During circuit conduction immunity simulation assessments, the existing black-box modeling methods for chips generally involve the use of time-domain-based modeling methods or ICIM-CI binary decision models, which can provide approximate immunity assessments but require a high number of tests to be performed when [...] Read more.
During circuit conduction immunity simulation assessments, the existing black-box modeling methods for chips generally involve the use of time-domain-based modeling methods or ICIM-CI binary decision models, which can provide approximate immunity assessments but require a high number of tests to be performed when carrying out broadband immunity assessments, as well as having a long modeling time and demonstrating poor reproducibility and insufficient accuracy in capturing the complex electromagnetic response in the frequency domain. To address these issues, in this paper, we propose a novel frequency-domain broadband model (Sensi-Freq-Model) of IC conduction susceptibility that accurately quantifies the conduction immunity of components in the frequency domain and builds a model of the IC based on the quantized data. The method provides high fitting accuracy in the frequency domain, which significantly improves the accuracy of circuit broadband design. The generated model retains as much information within the frequency-domain broadband as possible and reduces the need to rebuild the model under changing electromagnetic environments, thereby enhancing the portability and repeatability of the model. The ability to reduce the modeling time of the chip greatly improves modeling efficiency and circuit design. The results of this study show that the “Sensi-Freq-Model” reduces the broadband modeling time by about 90% compared to the traditional ICIM-CI method and improves the normalized mean square error (NMSE) by 18.5 dB. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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22 pages, 8080 KiB  
Article
A Cross-Process Signal Integrity Analysis (CPSIA) Method and Design Optimization for Wafer-on-Wafer Stacked DRAM
by Xiping Jiang, Xuerong Jia, Song Wang, Yixin Guo, Fuzhi Guo, Xiaodong Long, Li Geng, Jianguo Yang and Ming Liu
Micromachines 2024, 15(5), 557; https://doi.org/10.3390/mi15050557 - 23 Apr 2024
Cited by 1 | Viewed by 1564
Abstract
A multi-layer stacked Dynamic Random Access Memory (DRAM) platform is introduced to address the memory wall issue. This platform features high-density vertical interconnects established between DRAM units for high-capacity memory and logic units for computation, utilizing Wafer-on-Wafer (WoW) hybrid bonding and mini Through-Silicon [...] Read more.
A multi-layer stacked Dynamic Random Access Memory (DRAM) platform is introduced to address the memory wall issue. This platform features high-density vertical interconnects established between DRAM units for high-capacity memory and logic units for computation, utilizing Wafer-on-Wafer (WoW) hybrid bonding and mini Through-Silicon Via (TSV) technologies. This 3DIC architecture includes commercial DRAM, logic, and 3DIC manufacturing processes. Their design documents typically come from different foundries, presenting challenges for signal integrity design and analysis. This paper establishes a lumped circuit based on 3DIC physical structure and calculates all values of the lumped elements in the circuit model with the transmission line model. A Cross-Process Signal Integrity Analysis (CPSIA) method is introduced, which integrates three different manufacturing processes by modeling vertical stacking cells and connecting DRAM and logic netlists in one simulation environment. In combination with the dedicated buffer driving method, the CPSIA method is used to analyze 3DIC impacts. Simulation results show that the timing uncertainty introduced by 3DIC crosstalk ranges from 31 ps to 62 ps. This analysis result explains the stable slight variation in the maximum frequency observed in vertically stacked memory arrays from different DRAM layers in the physical testing results, demonstrating the effectiveness of this CPSIA method. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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13 pages, 1505 KiB  
Article
Compact Modeling of Advanced Gate-All-Around Nanosheet FETs Using Artificial Neural Network
by Yage Zhao, Zhongshan Xu, Huawei Tang, Yusi Zhao, Peishun Tang, Rongzheng Ding, Xiaona Zhu, David Wei Zhang and Shaofeng Yu
Micromachines 2024, 15(2), 218; https://doi.org/10.3390/mi15020218 - 31 Jan 2024
Cited by 1 | Viewed by 2050
Abstract
As the architecture of logic devices is evolving towards gate-all-around (GAA) structure, research efforts on advanced transistors are increasingly desired. In order to rapidly perform accurate compact modeling for these ultra-scaled transistors with the capability to cover dimensional variations, neural networks are considered. [...] Read more.
As the architecture of logic devices is evolving towards gate-all-around (GAA) structure, research efforts on advanced transistors are increasingly desired. In order to rapidly perform accurate compact modeling for these ultra-scaled transistors with the capability to cover dimensional variations, neural networks are considered. In this paper, a compact model generation methodology based on artificial neural network (ANN) is developed for GAA nanosheet FETs (NSFETs) at advanced technology nodes. The DC and AC characteristics of GAA NSFETs with various physical gate lengths (Lg), nanosheet widths (Wsh) and thicknesses (Tsh), as well as different gate voltages (Vgs) and drain voltages (Vds) are obtained through TCAD simulations. Subsequently, a high-precision ANN model architecture is evaluated. A systematical study on the impacts of ANN size, activation function, learning rate, and epoch (the times of complete pass through the entire training dataset) on the accuracy of ANN models is conducted, and a shallow neural network configuration for generating optimal ANN models is proposed. The results clearly show that the optimized ANN model can reproduce the DC and AC characteristics of NSFETs very accurately with a fitting error (MSE) of 0.01. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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11 pages, 7511 KiB  
Article
Comprehensive Comparison of MOCVD- and LPCVD-SiNx Surface Passivation for AlGaN/GaN HEMTs for 5G RF Applications
by Longge Deng, Likun Zhou, Hao Lu, Ling Yang, Qian Yu, Meng Zhang, Mei Wu, Bin Hou, Xiaohua Ma and Yue Hao
Micromachines 2023, 14(11), 2104; https://doi.org/10.3390/mi14112104 - 16 Nov 2023
Cited by 1 | Viewed by 2065
Abstract
Passivation is commonly used to suppress current collapse in AlGaN/GaN HEMTs. However, the conventional PECV-fabricated SiNx passivation layer is incompatible with the latest process, like the “passivation-prior-to-ohmic” method. Research attention has therefore turned to high-temperature passivation schemes. In this paper, we systematically [...] Read more.
Passivation is commonly used to suppress current collapse in AlGaN/GaN HEMTs. However, the conventional PECV-fabricated SiNx passivation layer is incompatible with the latest process, like the “passivation-prior-to-ohmic” method. Research attention has therefore turned to high-temperature passivation schemes. In this paper, we systematically investigated the differences between the SiNx/GaN interface of two high-temperature passivation schemes, MOCVD-SiNx and LPCVD-SiNx, and investigated their effects on the ohmic contact mechanism. By characterizing the device interface using TEM, we reveal that during the process of MOCVD-SiNx, etching damage and Si diffuses into the semiconductor to form a leakage path and reduce the breakdown voltage of the AlGaN/GaN HEMTs. Moreover, N enrichment at the edge of the ohmic region of the LPCVD-SiNx device indicates that the device is more favorable for TiN formation, thus reducing the ohmic contact resistance, which is beneficial to improving the PAE of the device. Through the CW load-pull test with drain voltage VDS = 20V, LPCVD-SiNx devices obtain a high PAE of 66.35%, which is about 6% higher than MOCVD-SiNx devices. This excellent result indicates that the prospect of LPCVD-SiNx passivation devices used in 5G small terminals will be attractive. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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11 pages, 4369 KiB  
Article
Exploring the Potential of GaN-Based Power HEMTs with Coherent Channel
by Xinghuan Chen, Fangzhou Wang, Zeheng Wang and Jing-Kai Huang
Micromachines 2023, 14(11), 2041; https://doi.org/10.3390/mi14112041 - 31 Oct 2023
Viewed by 1638
Abstract
The GaN industry always demands further improvement in the power transport capability of GaN-based high-energy mobility transistors (HEMT). This paper presents a novel enhancement-type GaN HEMT with high power transmission capability, which utilizes a coherent channel that can form a three-dimensional electron sea. [...] Read more.
The GaN industry always demands further improvement in the power transport capability of GaN-based high-energy mobility transistors (HEMT). This paper presents a novel enhancement-type GaN HEMT with high power transmission capability, which utilizes a coherent channel that can form a three-dimensional electron sea. The proposed device is investigated using the Silvaco simulation tool, which has been calibrated against experimental data. Numerical simulations prove that the proposed device has a very high on-state current above 3 A/mm, while the breakdown voltage (above 800 V) is not significantly affected. The calculated Johnson’s and Baliga’s figure-of-merits highlight the promise of using such a coherent channel for enhancing the performance of GaN HEMTs in power electronics applications. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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Review

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61 pages, 13055 KiB  
Review
Power Electronics Revolutionized: A Comprehensive Analysis of Emerging Wide and Ultrawide Bandgap Devices
by S M Sajjad Hossain Rafin, Roni Ahmed, Md. Asadul Haque, Md. Kamal Hossain, Md. Asikul Haque and Osama A. Mohammed
Micromachines 2023, 14(11), 2045; https://doi.org/10.3390/mi14112045 - 31 Oct 2023
Cited by 15 | Viewed by 7811
Abstract
This article provides a comprehensive review of wide and ultrawide bandgap power electronic semiconductor devices, comparing silicon (Si), silicon carbide (SiC), gallium nitride (GaN), and the emerging device diamond technology. Key parameters examined include bandgap, critical electric field, electron mobility, voltage/current ratings, switching [...] Read more.
This article provides a comprehensive review of wide and ultrawide bandgap power electronic semiconductor devices, comparing silicon (Si), silicon carbide (SiC), gallium nitride (GaN), and the emerging device diamond technology. Key parameters examined include bandgap, critical electric field, electron mobility, voltage/current ratings, switching frequency, and device packaging. The historical evolution of each material is traced from early research devices to current commercial offerings. Significant focus is given to SiC and GaN as they are now actively competing with Si devices in the market, enabled by their higher bandgaps. The paper details advancements in material growth, device architectures, reliability, and manufacturing that have allowed SiC and GaN adoption in electric vehicles, renewable energy, aerospace, and other applications requiring high power density, efficiency, and frequency operation. Performance enhancements over Si are quantified. However, the challenges associated with the advancements of these devices are also elaborately described: material availability, thermal management, gate drive design, electrical insulation, and electromagnetic interference. Alongside the cost reduction through improved manufacturing, material availability, thermal management, gate drive design, electrical insulation, and electromagnetic interference are critical hurdles of this technology. The review analyzes these issues and emerging solutions using advanced packaging, circuit integration, novel cooling techniques, and modeling. Overall, the manuscript provides a timely, rigorous examination of the state of the art in wide bandgap power semiconductors. It balances theoretical potential and practical limitations while assessing commercial readiness and mapping trajectories for further innovation. This article will benefit researchers and professionals advancing power electronic systems. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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15 pages, 3884 KiB  
Review
Trap Characterization Techniques for GaN-Based HEMTs: A Critical Review
by Xiazhi Zou, Jiayi Yang, Qifeng Qiao, Xinbo Zou, Jiaxiang Chen, Yang Shi and Kailin Ren
Micromachines 2023, 14(11), 2044; https://doi.org/10.3390/mi14112044 - 31 Oct 2023
Cited by 4 | Viewed by 4035
Abstract
Gallium nitride (GaN) high-electron-mobility transistors (HEMTs) have been considered promising candidates for power devices due to their superior advantages of high current density, high breakdown voltage, high power density, and high-frequency operations. However, the development of GaN HEMTs has been constrained by stability [...] Read more.
Gallium nitride (GaN) high-electron-mobility transistors (HEMTs) have been considered promising candidates for power devices due to their superior advantages of high current density, high breakdown voltage, high power density, and high-frequency operations. However, the development of GaN HEMTs has been constrained by stability and reliability issues related to traps. In this article, the locations and energy levels of traps in GaN HEMTs are summarized. Moreover, the characterization techniques for bulk traps and interface traps, whose characteristics and scopes are included as well, are reviewed and highlighted. Finally, the challenges in trap characterization techniques for GaN-based HEMTs are discussed to provide insights into the reliability assessment of GaN-based HEMTs. Full article
(This article belongs to the Special Issue Latest Advancements in Semiconductor Materials, Devices, and Systems)
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