Emerging Network-on-Chips (NoC) Architectures
A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "E：Engineering and Technology".
Deadline for manuscript submissions: closed (1 November 2021) | Viewed by 8152
Special Issue Editor
Special Issue Information
Dear Colleagues,
With an increasing number of IP cores in Multi-Processor System-on-Chips (MPSoCs) and many-core Chip Multi-Processors (CMPs), there exists a need for high-performance, trustable, and low-power intra-chip communication infrastructure. Network-on-Chips (NoCs) have been widely used as an efficient communication architecture for many core systems. Emerging NoC architectures take advantage of 3D integrations, photonic channels as well as wireless communications to boost the energy efficiency of traditional wired NoCs. In 3D NoCs, frequently communicating cores can be stacked in different layers of a 3D chip to shorten interconnects and, in turn, improve the chip power consumption and delay. Wireless NoCs, on the other hand, facilitate one-to-many information scatters that may take thousands of cycles in a wired NoC. And, photonic NoCs use silicon photonic interconnects with the aim of increasing the communication bandwidth while lowering dynamic power consumption. However, the security and reliability aspects of these emerging NoC architectures are not fully explored and need more investigations. As an instant, the topological irregularity of 3D and wireless NoCs opens new doors for benign or malicious thermal/traffic threats.
This Special Issue aims to attract cutting-edge research contributions of the field of emerging NoC-architectures for the design of modern MPSoCs. Original research papers in the field NoCs addressing the following topics and other related topics are encouraged for submission: emerging NoC architecture and implementation, addressing power/thermal issues in emerging NoCs, security and reliability issues of NoC architectures, application of machine learning for analysis, optimization, and verification of emerging NoC architectures, and NoC design for deep learning.
Dr. Ahmad Patooghy
Guest Editor
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Keywords
- 3D integration
- network-on-chip
- 3D network-on-chip
- wireless network-on-chip
- photonic network-on-chip
- multiprocessor system-on-chips
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