Semiconductor electronics is transforming computing, communication, energy harvesting, automobiles, biotechnology, and other electronic device landscapes. This transformation has been brought about by the ability to sense, receive, manipulate, and transmit data from the diverse systems of vertical stacks of semiconductor layers and microdevices.
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Semiconductor electronics is transforming computing, communication, energy harvesting, automobiles, biotechnology, and other electronic device landscapes. This transformation has been brought about by the ability to sense, receive, manipulate, and transmit data from the diverse systems of vertical stacks of semiconductor layers and microdevices. Though the discrete design details of each semiconductor may be extremely complex, the fundamental processing steps of each semiconductor device align well with the photolithography procedure. When these semiconductor layers are stacked using photolithography, the signal noise between the device features and layers is restricted by passivation or dielectric insulation provided by SiO
2 layers. Depending on the type of functionality and the data-sensing mechanism of the semiconductors used, SiO
2 layers have an intended fitness for their purpose. The purpose of SiO
2 layers can be summarized as the encapsulation of the semiconductor device, making part of the semiconductor layer inert, i.e., passivated, creating a hard mask to negate the impact of subsequent processes like ion implantation or diffusion, insulating a part of the layer as in an intermetallic dielectric or gate dielectric, and improving adhesion of the subsequent deposition. The functionality of the adhesion of SiO
2 is by far a less-studied area. The adhesive characteristics of SiO
2 for subsequent deposition and the thickness of SiO
2 affect stress distribution. Stresses due to SiO
2 thin films, which can range from a few nanometers to a few microns thick depending on the functionality, are modeled in this research. The stresses in SiO
2 films may cause delamination or discontinuity, affecting the performance and reliability of the optical or semiconductor devices they are built into. The classical molecular dynamics (MD) simulation technique was employed to investigate the stress characteristics of deposited films by leveraging the outcomes of atomistic modeling. A cluster made of fused silica was employed as a substrate. For the simulation of the SiO
2 deposition process, silicon atoms with high energies and low-energy oxygen atoms were injected. This model was carefully controlled to ensure the stoichiometric conditions. In this analysis, we used the open-source code LAMMPS (Large-scale Atomic/Molecular Massively Parallel Simulator) and the Ovito (Open Visualization) tool. The research in this paper focuses on SiO
2 thin-film simulation to validate analytical and experimental stress.
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